Stijn Heyde

A complete 60 GHz direct-conversion receiver front-end designed in 90 nm CMOS. The design includes a low-noise amplifier (LNA), a downconversion mixer, a voltage-controlled oscillator (VCO) with output buffer, and a baseband amplifier, all meeting 50 Ω input and output matching requirements.

Circuit-level simulations covered all key RF performance metrics: input matching (S11), power conversion gain, noise figure, VCO tuning range and phase noise, and the 1 dB compression point to characterize linearity.

Passive mmWave component modeling was carried out in ADS, including extraction of inductor S-parameters for accurate integration of on-chip passives at millimeter-wave frequencies.